Members of the press and semiconductor industry analysts are invited to request a complimentary full-access pass to Chiplet Summit! Please contact Elizabeth at [email protected] to make your request.
Members of the press and semiconductor industry analysts are invited to request a complimentary full-access pass to Chiplet Summit! Please contact Elizabeth at [email protected] to make your request.
Chiplet Summit held its third annual event at the Santa Clara Convention Center on January 21-23. Both registration and total attendance nearly doubled from 2024 (1765 and 1047, respectively).
In January 2025, MRSI Mycronic will sponsor and exhibit at the prestigious Chiplet Summit. This event gathers global leaders in semiconductor technology to discuss innovations in chiplet design and integration.
Chiplet Summit’s 2025 event offers the last word on leading-edge chip design at the Santa Clara Convention Center on January 21-23. The Tuesday tutorials cover advanced packaging technologies, die-to-die interfaces, design methods, working with foundries, and the Open Chiplet Economy. Wednesday sessions cover creating foundry-ready designs, getting the most from high-bandwidth memory (HBM), and system-technology co-optimization (STCO). Thursday panels discuss viable markets, making money with chiplets, and long-term trends.
Emphasis is on AI applications. The third annual Chiplet Summit, to occur on January 21-23 at the Santa Clara Convention Center, has now set its final keynote schedule.
In January 2025, MRSI Mycronic will sponsor and exhibit at the prestigious Chiplet Summit. This event gathers global leaders in semiconductor technology to discuss innovations in chiplet design and integration.
Chiplet Summit’s 2025 event offers the last word on leading-edge chip design at the Santa Clara Convention Center on January 21-23. The Tuesday tutorials cover advanced packaging technologies, die-to-die interfaces, design methods, working with foundries, and the Open Chiplet Economy. Wednesday sessions cover creating foundry-ready designs, getting the most from high-bandwidth memory (HBM), and system-technology co-optimization (STCO). Thursday panels discuss viable markets, making money with chiplets, and long-term trends.
Emphasis is on bringing diverse practitioners up to date on all aspects of chiplets. The third annual Chiplet Summit, to occur on January 21-23 at the Santa Clara Convention Center, has now set its pre-conference day schedule for Tuesday, January 21.
Chiplet Summit opens pre-registration today for its third annual event on January 21-23 at the Santa Clara Convention Center. All major chip makers have adopted chiplets as their way to produce devices at leading-edge nodes.
The third annual Chiplet Summit, at the Santa Clara Convention Center on January 21-23, 2025, has now set its initial keynote schedule.
Chiplet Summit announces its third annual event on January 21-23 at the Santa Clara Convention Center. The 2025 event focuses on a new level in chip design: system-in- package (SiP). SiPs use advanced packaging to raise performance and reduce time-to-market. Co-optimization methods allow all design stages to proceed together. The event also covers supercomputer-in-a-package, a low-cost way to support generative AI.
Chiplet Summit is the key show for a technology that AMD, Intel, and Samsung all use in creating their new chips. The 2025 event will be at the Santa Clara Convention Center on January 21-23. It covers design methods, interfaces, and packaging. It offers keynotes, tutorials, and sessions on recent advances, new tools, and likely breakthroughs. The emphasis is on showing specialists how to work together to reduce cost and time-to-market.
Smaller design nodes are now far more costly and much harder to achieve. So interest has turned to approaches that do more at the package level. Chiplet Summit helps educate both design and packaging engineers. The advanced packaging tutorial covers methods such as 3D, wafer-scale, and panel-scale. The Working with Foundries tutorial then shows how such approaches have become part of manufacturing. Later sessions deal with finding the right package for an application, as well as short-term and longterm trends.
SAN DIEGO, CA – February 26, 2024 – Chiplet Summit held its second annual event at the Santa Clara Convention Center on February 6-8. Both registration (883) and total attendance (534) increased by over two-thirds from 2023. Key areas of interest were advanced packaging methods, high-speed die-to-die interfaces, generative AI applications, and the open chiplet economy. Keynoters were Applied Materials, Synopsys, Micron, Alphawave Semi, Hyperion Technologies (new packaging methods), and Open Compute Project.
SAN DIEGO, CA — January 16, 2024 — Pre-registration is now open for Chiplet Summit’s second annual event on February 6-8 at the Santa Clara Convention Center. Hundreds of registrants and many key exhibitors will be at the premier showcase for chiplet technology. All major chip makers have adopted chiplets as their approach to producing devices at leading-edge nodes.
SAN DIEGO, CA – January 9, 2024 – Chiplet Summit opens pre-registration today for its second annual event on February 6-8 at the Santa Clara Convention Center. Hundreds of registrants and many key exhibitors will be at the premier showcase for chiplet technology. All major chip makers have adopted chiplets as their approach to producing devices at leading-edge nodes.
SAN DIEGO, CA – December 11, 2023 – Chiplet Summit’s 2024 event offers the last word on leading-edge design at the Santa Clara Convention Center on February 6-8. The Tuesday tutorials cover advanced packaging technologies, AI in chiplet design, die-to-die interfaces, working with foundries, and the Open Chiplet Economy.
SAN DIEGO, CA – December 4, 2023 – Chiplet Summit 2024 Focuses on Accelerating Generative AI.
SAN DIEGO, CA – November 13, 2023 – Chiplet Summit Is the Only Event Covering All Aspects of Developing Chips at the Smallest Process Nodes
Chiplet Summit has quickly become the key show in a technology that AMD, Intel, NVIDIA, and Samsung all say is strategic to their futures. The 2024 event at the Santa Clara Convention Center on February 6-8 covers architectures, design methods, interfaces, packaging, and integration.
SAN DIEGO, CA — (BUSINESS WIRE) — December 13, 2022 — Chiplet Summit Partners with Yole Group to Offer the Latest Results
Chiplet Summit announces Yole Group as its market research partner for its first annual event. The Summit will occur on January 24-26 at the Doubletree San Jose. Yole Group will analyze the chiplet market and cover both short and long-term trends.
SAN DIEGO, CA — (BUSINESS WIRE) — December 9, 2022 — Chiplets Shorten Chip Design Cycles. Chiplet Summit opens pre-registration today for its first annual event.
It will occur on January 24-26 at the Doubletree by Hilton San Jose. Hundreds of registrants and many key exhibitors will be at the first showcase for chiplet technology, the latest approach for developing state-of-the-art chips. All leading chip makers have adopted chiplets as their approach to making devices at process nodes of 5 nm and below.
SAN DIEGO, CA – November 15, 2022 – Emphasis is on semiconductor design, packaging, test, and integration in the chiplet era.
The first annual Chiplet Summit, to occur on January 24-26, 2023 at the Doubletree by Hilton San Jose, has now set its initial keynote schedule.
SAN DIEGO, CA – October 18, 2022 –Chiplets Need an Event Covering All Aspects of Development.
Chiplet Summit is a major addition to the chiplet ecosystem. Debuting at the Doubletree by Hilton San Jose on January 24-26, 2023, it covers architectures, design methods, interfaces, packaging, test and integration, and standards.
SAN DIEGO, CA – September 13, 2022 – Chiplets Offer Designers a Drop-In Approach.
Chiplet Summit will be the first event to include all aspects of chiplet-based development. Debuting at the Doubletree by Hilton San Jose on January 24-26, it will cover partitioning, architecture, design methods, interfaces, packaging, and test and integration. Sessions will focus on handling new process nodes, reducing costs, and allowing easy drop-in of existing designs. Attendees will learn how to increase modularity and create markets for chiplet IP. The results are designs that perform better and shrink time-to-market.
SAN DIEGO, CA – August 18, 2022 – Chiplets Reduce Development Time and Cost.
Chiplet Summit debuts at the San Jose Doubletree Hotel on January 24-26, 2023. It focuses on techniques that extend Moore’s Law to ever-smaller dimensions. Chiplets reduce costs, increase modularity and scalability, and avoid wastage and manufacturing defects. Chiplets lead to better chips and faster time-to-market.
